
play:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400678 <_init>:
  400678:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40067c:	910003fd 	mov	x29, sp
  400680:	9400004e 	bl	4007b8 <call_weak_fn>
  400684:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400688:	d65f03c0 	ret

Disassembly of section .plt:

0000000000400690 <.plt>:
  400690:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  400694:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf4dc>
  400698:	f947fe11 	ldr	x17, [x16, #4088]
  40069c:	913fe210 	add	x16, x16, #0xff8
  4006a0:	d61f0220 	br	x17
  4006a4:	d503201f 	nop
  4006a8:	d503201f 	nop
  4006ac:	d503201f 	nop

00000000004006b0 <perror@plt>:
  4006b0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4006b4:	f9400211 	ldr	x17, [x16]
  4006b8:	91000210 	add	x16, x16, #0x0
  4006bc:	d61f0220 	br	x17

00000000004006c0 <fclose@plt>:
  4006c0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4006c4:	f9400611 	ldr	x17, [x16, #8]
  4006c8:	91002210 	add	x16, x16, #0x8
  4006cc:	d61f0220 	br	x17

00000000004006d0 <fopen@plt>:
  4006d0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4006d4:	f9400a11 	ldr	x17, [x16, #16]
  4006d8:	91004210 	add	x16, x16, #0x10
  4006dc:	d61f0220 	br	x17

00000000004006e0 <open@plt>:
  4006e0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4006e4:	f9400e11 	ldr	x17, [x16, #24]
  4006e8:	91006210 	add	x16, x16, #0x18
  4006ec:	d61f0220 	br	x17

00000000004006f0 <__libc_start_main@plt>:
  4006f0:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  4006f4:	f9401211 	ldr	x17, [x16, #32]
  4006f8:	91008210 	add	x16, x16, #0x20
  4006fc:	d61f0220 	br	x17

0000000000400700 <close@plt>:
  400700:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400704:	f9401611 	ldr	x17, [x16, #40]
  400708:	9100a210 	add	x16, x16, #0x28
  40070c:	d61f0220 	br	x17

0000000000400710 <__gmon_start__@plt>:
  400710:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400714:	f9401a11 	ldr	x17, [x16, #48]
  400718:	9100c210 	add	x16, x16, #0x30
  40071c:	d61f0220 	br	x17

0000000000400720 <write@plt>:
  400720:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400724:	f9401e11 	ldr	x17, [x16, #56]
  400728:	9100e210 	add	x16, x16, #0x38
  40072c:	d61f0220 	br	x17

0000000000400730 <abort@plt>:
  400730:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400734:	f9402211 	ldr	x17, [x16, #64]
  400738:	91010210 	add	x16, x16, #0x40
  40073c:	d61f0220 	br	x17

0000000000400740 <puts@plt>:
  400740:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400744:	f9402611 	ldr	x17, [x16, #72]
  400748:	91012210 	add	x16, x16, #0x48
  40074c:	d61f0220 	br	x17

0000000000400750 <fread@plt>:
  400750:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400754:	f9402a11 	ldr	x17, [x16, #80]
  400758:	91014210 	add	x16, x16, #0x50
  40075c:	d61f0220 	br	x17

0000000000400760 <printf@plt>:
  400760:	b0000090 	adrp	x16, 411000 <perror@GLIBC_2.17>
  400764:	f9402e11 	ldr	x17, [x16, #88]
  400768:	91016210 	add	x16, x16, #0x58
  40076c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400770 <_start>:
  400770:	d280001d 	mov	x29, #0x0                   	// #0
  400774:	d280001e 	mov	x30, #0x0                   	// #0
  400778:	aa0003e5 	mov	x5, x0
  40077c:	f94003e1 	ldr	x1, [sp]
  400780:	910023e2 	add	x2, sp, #0x8
  400784:	910003e6 	mov	x6, sp
  400788:	580000c0 	ldr	x0, 4007a0 <_start+0x30>
  40078c:	580000e3 	ldr	x3, 4007a8 <_start+0x38>
  400790:	58000104 	ldr	x4, 4007b0 <_start+0x40>
  400794:	97ffffd7 	bl	4006f0 <__libc_start_main@plt>
  400798:	97ffffe6 	bl	400730 <abort@plt>
  40079c:	00000000 	.inst	0x00000000 ; undefined
  4007a0:	004008e0 	.word	0x004008e0
  4007a4:	00000000 	.word	0x00000000
  4007a8:	004009f0 	.word	0x004009f0
  4007ac:	00000000 	.word	0x00000000
  4007b0:	00400a70 	.word	0x00400a70
  4007b4:	00000000 	.word	0x00000000

00000000004007b8 <call_weak_fn>:
  4007b8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf4dc>
  4007bc:	f947f000 	ldr	x0, [x0, #4064]
  4007c0:	b4000040 	cbz	x0, 4007c8 <call_weak_fn+0x10>
  4007c4:	17ffffd3 	b	400710 <__gmon_start__@plt>
  4007c8:	d65f03c0 	ret
  4007cc:	00000000 	.inst	0x00000000 ; undefined

00000000004007d0 <deregister_tm_clones>:
  4007d0:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4007d4:	9101c000 	add	x0, x0, #0x70
  4007d8:	b0000081 	adrp	x1, 411000 <perror@GLIBC_2.17>
  4007dc:	9101c021 	add	x1, x1, #0x70
  4007e0:	eb00003f 	cmp	x1, x0
  4007e4:	540000a0 	b.eq	4007f8 <deregister_tm_clones+0x28>  // b.none
  4007e8:	90000001 	adrp	x1, 400000 <_init-0x678>
  4007ec:	f9454821 	ldr	x1, [x1, #2704]
  4007f0:	b4000041 	cbz	x1, 4007f8 <deregister_tm_clones+0x28>
  4007f4:	d61f0020 	br	x1
  4007f8:	d65f03c0 	ret
  4007fc:	d503201f 	nop

0000000000400800 <register_tm_clones>:
  400800:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400804:	9101c000 	add	x0, x0, #0x70
  400808:	b0000081 	adrp	x1, 411000 <perror@GLIBC_2.17>
  40080c:	9101c021 	add	x1, x1, #0x70
  400810:	cb000021 	sub	x1, x1, x0
  400814:	9343fc21 	asr	x1, x1, #3
  400818:	8b41fc21 	add	x1, x1, x1, lsr #63
  40081c:	9341fc21 	asr	x1, x1, #1
  400820:	b40000a1 	cbz	x1, 400834 <register_tm_clones+0x34>
  400824:	90000002 	adrp	x2, 400000 <_init-0x678>
  400828:	f9454c42 	ldr	x2, [x2, #2712]
  40082c:	b4000042 	cbz	x2, 400834 <register_tm_clones+0x34>
  400830:	d61f0040 	br	x2
  400834:	d65f03c0 	ret

0000000000400838 <__do_global_dtors_aux>:
  400838:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40083c:	910003fd 	mov	x29, sp
  400840:	f9000bf3 	str	x19, [sp, #16]
  400844:	b0000093 	adrp	x19, 411000 <perror@GLIBC_2.17>
  400848:	3941c260 	ldrb	w0, [x19, #112]
  40084c:	35000080 	cbnz	w0, 40085c <__do_global_dtors_aux+0x24>
  400850:	97ffffe0 	bl	4007d0 <deregister_tm_clones>
  400854:	52800020 	mov	w0, #0x1                   	// #1
  400858:	3901c260 	strb	w0, [x19, #112]
  40085c:	f9400bf3 	ldr	x19, [sp, #16]
  400860:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400864:	d65f03c0 	ret

0000000000400868 <frame_dummy>:
  400868:	17ffffe6 	b	400800 <register_tm_clones>

000000000040086c <audio_open>:
  40086c:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400870:	910003fd 	mov	x29, sp
  400874:	f9000fa0 	str	x0, [x29, #24]
  400878:	f9000ba1 	str	x1, [x29, #16]
  40087c:	f9400ba0 	ldr	x0, [x29, #16]
  400880:	f100001f 	cmp	x0, #0x0
  400884:	54000081 	b.ne	400894 <audio_open+0x28>  // b.any
  400888:	90000000 	adrp	x0, 400000 <_init-0x678>
  40088c:	912a8000 	add	x0, x0, #0xaa0
  400890:	f9000ba0 	str	x0, [x29, #16]
  400894:	52800041 	mov	w1, #0x2                   	// #2
  400898:	f9400ba0 	ldr	x0, [x29, #16]
  40089c:	97ffff91 	bl	4006e0 <open@plt>
  4008a0:	2a0003e1 	mov	w1, w0
  4008a4:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4008a8:	9101e000 	add	x0, x0, #0x78
  4008ac:	b9000001 	str	w1, [x0]
  4008b0:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4008b4:	9101e000 	add	x0, x0, #0x78
  4008b8:	b9400000 	ldr	w0, [x0]
  4008bc:	7100001f 	cmp	w0, #0x0
  4008c0:	540000aa 	b.ge	4008d4 <audio_open+0x68>  // b.tcont
  4008c4:	f9400ba0 	ldr	x0, [x29, #16]
  4008c8:	97ffff7a 	bl	4006b0 <perror@plt>
  4008cc:	12800000 	mov	w0, #0xffffffff            	// #-1
  4008d0:	14000002 	b	4008d8 <audio_open+0x6c>
  4008d4:	12800000 	mov	w0, #0xffffffff            	// #-1
  4008d8:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4008dc:	d65f03c0 	ret

00000000004008e0 <main>:
  4008e0:	d14013ff 	sub	sp, sp, #0x4, lsl #12
  4008e4:	a9007bfd 	stp	x29, x30, [sp]
  4008e8:	910003fd 	mov	x29, sp
  4008ec:	90000000 	adrp	x0, 400000 <_init-0x678>
  4008f0:	912a8001 	add	x1, x0, #0xaa0
  4008f4:	910043a0 	add	x0, x29, #0x10
  4008f8:	97ffffdd 	bl	40086c <audio_open>
  4008fc:	90000000 	adrp	x0, 400000 <_init-0x678>
  400900:	912ac001 	add	x1, x0, #0xab0
  400904:	90000000 	adrp	x0, 400000 <_init-0x678>
  400908:	912ae000 	add	x0, x0, #0xab8
  40090c:	97ffff71 	bl	4006d0 <fopen@plt>
  400910:	f91ffba0 	str	x0, [x29, #16368]
  400914:	f95ffba0 	ldr	x0, [x29, #16368]
  400918:	f100001f 	cmp	x0, #0x0
  40091c:	54000081 	b.ne	40092c <main+0x4c>  // b.any
  400920:	90000000 	adrp	x0, 400000 <_init-0x678>
  400924:	912b2000 	add	x0, x0, #0xac8
  400928:	97ffff86 	bl	400740 <puts@plt>
  40092c:	90000000 	adrp	x0, 400000 <_init-0x678>
  400930:	912b8000 	add	x0, x0, #0xae0
  400934:	97ffff83 	bl	400740 <puts@plt>
  400938:	b93fffbf 	str	wzr, [x29, #16380]
  40093c:	1400001f 	b	4009b8 <main+0xd8>
  400940:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400944:	91020000 	add	x0, x0, #0x80
  400948:	f95ffba3 	ldr	x3, [x29, #16368]
  40094c:	d283fc82 	mov	x2, #0x1fe4                	// #8164
  400950:	d2800021 	mov	x1, #0x1                   	// #1
  400954:	97ffff7f 	bl	400750 <fread@plt>
  400958:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  40095c:	9101e000 	add	x0, x0, #0x78
  400960:	b9400003 	ldr	w3, [x0]
  400964:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  400968:	91020000 	add	x0, x0, #0x80
  40096c:	d283fc82 	mov	x2, #0x1fe4                	// #8164
  400970:	aa0003e1 	mov	x1, x0
  400974:	2a0303e0 	mov	w0, w3
  400978:	97ffff6a 	bl	400720 <write@plt>
  40097c:	b93fefa0 	str	w0, [x29, #16364]
  400980:	90000000 	adrp	x0, 400000 <_init-0x678>
  400984:	912bc000 	add	x0, x0, #0xaf0
  400988:	b97fefa1 	ldr	w1, [x29, #16364]
  40098c:	97ffff75 	bl	400760 <printf@plt>
  400990:	b97fefa1 	ldr	w1, [x29, #16364]
  400994:	5283fc80 	mov	w0, #0x1fe4                	// #8164
  400998:	6b00003f 	cmp	w1, w0
  40099c:	54000080 	b.eq	4009ac <main+0xcc>  // b.none
  4009a0:	90000000 	adrp	x0, 400000 <_init-0x678>
  4009a4:	912c2000 	add	x0, x0, #0xb08
  4009a8:	97ffff42 	bl	4006b0 <perror@plt>
  4009ac:	b97fffa0 	ldr	w0, [x29, #16380]
  4009b0:	11000400 	add	w0, w0, #0x1
  4009b4:	b93fffa0 	str	w0, [x29, #16380]
  4009b8:	b97fffa0 	ldr	w0, [x29, #16380]
  4009bc:	7100741f 	cmp	w0, #0x1d
  4009c0:	54fffc0d 	b.le	400940 <main+0x60>
  4009c4:	f95ffba0 	ldr	x0, [x29, #16368]
  4009c8:	97ffff3e 	bl	4006c0 <fclose@plt>
  4009cc:	b0000080 	adrp	x0, 411000 <perror@GLIBC_2.17>
  4009d0:	9101e000 	add	x0, x0, #0x78
  4009d4:	b9400000 	ldr	w0, [x0]
  4009d8:	97ffff4a 	bl	400700 <close@plt>
  4009dc:	52800000 	mov	w0, #0x0                   	// #0
  4009e0:	a9407bfd 	ldp	x29, x30, [sp]
  4009e4:	914013ff 	add	sp, sp, #0x4, lsl #12
  4009e8:	d65f03c0 	ret
  4009ec:	00000000 	.inst	0x00000000 ; undefined

00000000004009f0 <__libc_csu_init>:
  4009f0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  4009f4:	910003fd 	mov	x29, sp
  4009f8:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009fc:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf4dc>
  400a00:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf4dc>
  400a04:	91374294 	add	x20, x20, #0xdd0
  400a08:	913722b5 	add	x21, x21, #0xdc8
  400a0c:	a902dff6 	stp	x22, x23, [sp, #40]
  400a10:	cb150294 	sub	x20, x20, x21
  400a14:	f9001ff8 	str	x24, [sp, #56]
  400a18:	2a0003f6 	mov	w22, w0
  400a1c:	aa0103f7 	mov	x23, x1
  400a20:	9343fe94 	asr	x20, x20, #3
  400a24:	aa0203f8 	mov	x24, x2
  400a28:	97ffff14 	bl	400678 <_init>
  400a2c:	b4000194 	cbz	x20, 400a5c <__libc_csu_init+0x6c>
  400a30:	f9000bb3 	str	x19, [x29, #16]
  400a34:	d2800013 	mov	x19, #0x0                   	// #0
  400a38:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400a3c:	aa1803e2 	mov	x2, x24
  400a40:	aa1703e1 	mov	x1, x23
  400a44:	2a1603e0 	mov	w0, w22
  400a48:	91000673 	add	x19, x19, #0x1
  400a4c:	d63f0060 	blr	x3
  400a50:	eb13029f 	cmp	x20, x19
  400a54:	54ffff21 	b.ne	400a38 <__libc_csu_init+0x48>  // b.any
  400a58:	f9400bb3 	ldr	x19, [x29, #16]
  400a5c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a60:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a64:	f9401ff8 	ldr	x24, [sp, #56]
  400a68:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a6c:	d65f03c0 	ret

0000000000400a70 <__libc_csu_fini>:
  400a70:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a74 <_fini>:
  400a74:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a78:	910003fd 	mov	x29, sp
  400a7c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a80:	d65f03c0 	ret
